{"created":"2023-05-15T12:21:01.579649+00:00","id":11792,"links":{},"metadata":{"_buckets":{"deposit":"eb31ee3c-3159-46b2-b62a-629f06e03b5a"},"_deposit":{"created_by":1,"id":"11792","owners":[1],"pid":{"revision_id":0,"type":"depid","value":"11792"},"status":"published"},"_oai":{"id":"oai:kansai-u.repo.nii.ac.jp:00011792","sets":["528:1588:1617:1627"]},"author_link":["28228","28226","28229","28227"],"item_10_biblio_info_7":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2007-03-20","bibliographicIssueDateType":"Issued"},"bibliographicPageEnd":"18","bibliographicPageStart":"11","bibliographicVolumeNumber":"49","bibliographic_titles":[{"bibliographic_title":"関西大学工学研究報告 = Technology reports of the Kansai University"}]}]},"item_10_description_4":{"attribute_name":"概要","attribute_value_mlt":[{"subitem_description":"This paper proposes a compact equivalent-circuit model for the snap-back phenomenon in ultra-thin SOI MOSFET's. The model can be used in simulations of I/O circuits with ESD-protection devices. The model is more simple than past models, but it successfully reproduces the snap-back response. With the aid of many simulations, we propose a　guideline for snap-back SOI MOSFET device design. Useful parameter-sensitivity　equations for device characteristics are given for practical device designs.","subitem_description_type":"Other"}]},"item_10_full_name_3":{"attribute_name":"著者別名","attribute_value_mlt":[{"nameIdentifiers":[{"nameIdentifier":"28228","nameIdentifierScheme":"WEKO"}],"names":[{"name":"志和屋, 陽一"}]},{"nameIdentifiers":[{"nameIdentifier":"28229","nameIdentifierScheme":"WEKO"}],"names":[{"name":"大村, 泰久"}]}]},"item_10_publisher_34":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"関西大学工学部"}]},"item_10_source_id_10":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00046916","subitem_source_identifier_type":"NCID"}]},"item_10_source_id_8":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"04532198","subitem_source_identifier_type":"ISSN"}]},"item_10_version_type_17":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_970fb48d4fbd8a85","subitem_version_type":"VoR"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Shiwaya, Yoichi"}],"nameIdentifiers":[{"nameIdentifier":"28226","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Omura, Yasuhisa"}],"nameIdentifiers":[{"nameIdentifier":"28227","nameIdentifierScheme":"WEKO"},{"nameIdentifier":"20298839","nameIdentifierScheme":"e-Rad","nameIdentifierURI":"https://nrid.nii.ac.jp/ja/nrid/1000020298839"}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2019-05-23"}],"displaytype":"detail","filename":"KU-1100-20070300-03.pdf","filesize":[{"value":"562.8 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"KU-1100-20070300-03.pdf","url":"https://kansai-u.repo.nii.ac.jp/record/11792/files/KU-1100-20070300-03.pdf"},"version_id":"1a6edd35-78cf-4205-a564-34ac5aeb40f7"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"SOI MOSFET","subitem_subject_scheme":"Other"},{"subitem_subject":"snap-back","subitem_subject_scheme":"Other"},{"subitem_subject":"parasitic bipolar action","subitem_subject_scheme":"Other"},{"subitem_subject":"electrostatic discharge","subitem_subject_scheme":"Other"},{"subitem_subject":"equivalent circuit model","subitem_subject_scheme":"Other"},{"subitem_subject":"関西大学","subitem_subject_scheme":"Other"},{"subitem_subject":"Kansai University","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"departmental bulletin paper","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"Compact Equivalent-Circuit Model for Snap-Back Phenomena in Ultra-Thin SOI MOSFET's and Practical Guideline for ESD-Protection Device Design","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Compact Equivalent-Circuit Model for Snap-Back Phenomena in Ultra-Thin SOI MOSFET's and Practical Guideline for ESD-Protection Device Design"}]},"item_type_id":"10","owner":"1","path":["1627"],"pubdate":{"attribute_name":"公開日","attribute_value":"2011-12-08"},"publish_date":"2011-12-08","publish_status":"0","recid":"11792","relation_version_is_last":true,"title":["Compact Equivalent-Circuit Model for Snap-Back Phenomena in Ultra-Thin SOI MOSFET's and Practical Guideline for ESD-Protection Device Design"],"weko_creator_id":"1","weko_shared_id":1},"updated":"2023-05-15T14:52:38.995816+00:00"}